On-chip cryptographic protocol lets quantum computers self-verify results amid hardware noise – Phys.org
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November 11, 2025 feature
by Ingrid Fadelli, Phys.org
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edited by Gaby Clark, reviewed by Robert Egan
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This article has been reviewed according to Science X’s editorial process and policies. Editors have highlighted the following attributes while ensuring the content’s credibility:
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Quantum computers, machines that process information leveraging quantum mechanical effects, could outperform classical computers on some optimization tasks and computations. Despite their potential, quantum computers are known to be prone to errors and their ability to perform computations is easily influenced by noise.
Quantum scientists and engineers have thus been developing verification protocols, tools designed to check whether quantum computers are computing information correctly. Ideally, these protocols should also provide cryptographic security, meaning that they should ensure that the information processed by computers cannot be forged or tampered with by malicious users.
Researchers at Sorbonne University, University of Edinburgh and Quantinuum recently introduced a new on-chip cryptographically secure verification protocol for quantum computers. The new protocol, outlined in a paper published in Physical Review Letters, was successfully deployed on Quantinuum’s H1-1 quantum processor.
“This project began as a collaboration between Sorbonne University, Quantum Software Lab at the University of Edinburgh, and Quantinuum,” Cica Gustiani, an author of the paper, told Phys.org.
“Most of us are theorists working on measurement-based quantum computing and cryptographic protocols that guarantee security and verification. We’ve had strong theoretical results for years, so naturally, we wanted to see how they perform on real hardware—and the collaboration with Quantinuum offered the perfect opportunity to make that happen.”
Cica is a theoretical physicist, but over the years she collaborated with several experimentalists to turn theories into testable concepts. The aim of her recent study was to test a new verification protocol on a quantum computing platform.
“We first mapped out the theoretical requirements of our protocol, then tailored it to Quantinuum’s H1-1 machine,” said Cica. “I was genuinely impressed by the fidelity of their gates and measurements and how easily we could access the device. We pushed it further than we expected—up to 52 nodes—by reusing measured ions from 20 available ions in the trap.”
The primary objective of the team’s recent efforts was to develop a verification protocol that is cryptographically secure and that is NISQ-friendly, which means that it can be successfully deployed on the quantum computing systems available today.
“As Quantinuum’s machines get larger and larger, it becomes impossible to verify their outputs through comparisons to classical simulations,” said Dan Mills, researcher at Quantinuum and co-author of the paper.
“This will certainly be relevant for Helios and subsequent generations of our QPUs. As such, it is important for us and our users that we can guarantee a level of trust in the outputs. Verification is a well-established route to doing this, but so far it is a relatively theoretical and abstract field. This collaboration aimed to bridge the gap between theory and hardware to develop a practical verification protocol, bespoke to our machines.”
Over the past few years, researchers have introduced various verification protocols for quantum computing. Most of these solutions, however, were merely theoretical in nature and not applicable to existing quantum processors.
“In simple terms, we tried to make quantum computers prove they’re telling the truth,” said Cica. “We took a cryptographic verification protocol that usually requires communication between two devices and made it work entirely on a single chip. The idea is that even if the hardware is noisy or imperfect, it can still verify its own results through built-in tests and randomness.”
Despite its similarity to other protocols introduced in the past, the team’s approach is among the first to enable on-chip verification. This is in stark contrast with other available tools, which require other external systems or two distinct processors to cross-check computations.
“For example, Google’s recent Quantum Echoes experiment relied on two separate quantum processors to cross-check results,” said Cica. “While this is a powerful consistency test, our method goes a step further: the device verifies itself, without needing a second machine.
“It’s a step toward quantum computers that can certify their own results in real-time, using only the technology we already have today.”
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The verification approach developed by Cica and her colleagues builds on a previously introduced protocol, which was originally designed to be deployed in a client-server setup. This is a scenario in which a client (e.g., Alice) wishes to delegate her quantum computations to a more powerful server (i.e., Bob).
“The idea is that Alice doesn’t have to trust Bob at all. She sends him instructions, but she also hides random ‘traps’ in the computation,” said Cica. “By looking at Bob’s responses, she can later check whether he performed the computation honestly, all without revealing what the actual computation was.”
As part of their study, the researchers applied the same idea to an entirely different scenario in which verification is performed directly on-chip. This means that a quantum computer itself is treated as the ‘untrusted’ party, instead of delegating computations to an ‘untrusted’ server.
“The ‘malicious’ behavior now comes from the hardware noise or miscalibration—in other words, from the imperfections of the device,” said Cica. “The protocol works by randomly mixing test runs and computation runs. From the test runs, we can statistically decide whether to trust the computational results.”
The most notable advantage of the team’s protocol is that it removes the need for a quantum network, which would be difficult to establish in real-world settings. Instead, it relies on the capabilities of individual processors, such as mid-circuit measurements, adaptive operations and uniform qubits.
Cica, Mills and their colleagues demonstrated the potential of their cryptographic verification protocol on the H-1 trapped-ion device, a quantum processor developed at Quantinuum.
“We ran our protocol, randomly alternating between tests and real computations, and used the data from the test rounds to verify the results,” said Cica. “We also ran a small calibration step—a single-qubit tomography—to measure how confident we could be in our verification for that specific device and number of qubits.”
With their protocol, the researchers were able to verify the largest measurement-based quantum computation to date (i.e., a graph state involving 52 entangled qubits or nodes). This promising result suggests that even if quantum computers cannot be fully trusted yet, some techniques can help to securely determine whether the results of their computations are correct.
“We brought a fully verified quantum computation onto real hardware using today’s technology,” said Cica. “We scaled the protocol to 52 nodes—the largest verified measurement-based quantum computation so far—and showed that cryptographically inspired verification can already work on near-term devices. In the future, when quantum computers are too large to cross-check with classical simulations, this kind of on-the-spot certification will be crucial—it lets you know, as you run the computation, whether the result can be trusted.”
The cryptographic verification protocol developed by Cica and her colleagues could soon be improved and evaluated further. The researchers are now trying to make the protocol compatible with fault-tolerant architectures and ensure that it works with more realistic noise models.
“The protocol already works under a very general assumption—Markovian noise—which covers most quantum channels and can be efficiently simulated,” said Cica. “Yet real devices can also show non-Markovian effects, where errors have memory, and that’s an active area of research with many open challenges.”
The authors of the paper are now also trying to tighten confidence bounds, as this would allow them to estimate the number of qubits or nodes that can be reliably verified by their protocol in the presence of specific noise levels. Their long-term goal is to ensure that verification can be easily scaled up and adapted to different hardware systems, enabling fault-tolerant and secure quantum computing.
“This project has been an exciting demonstration of a new tool which is executable on existing hardware,” added Mills. “As we push on with our road map at Quantinuum, we will continue to adapt these tools to new functionality available on the devices, and new demands by the users.
“Notably, we continue to develop our fault-tolerant capabilities with each new generation of machine. Adapting these verification techniques to be used alongside error detection and correction codes is important and presents a new set of challenges, but we’re looking forward to it.”
Written for you by our author Ingrid Fadelli, edited by Gaby Clark, and fact-checked and reviewed by Robert Egan—this article is the result of careful human work. We rely on readers like you to keep independent science journalism alive. If this reporting matters to you, please consider a donation (especially monthly). You’ll get an ad-free account as a thank-you.
More information: Cica Gustiani et al, On-Chip Verified Quantum Computation with an Ion-Trap Quantum Processing Unit, Physical Review Letters (2025). DOI: 10.1103/jpms-v3kw.
Journal information: Physical Review Letters
Journal information: Physical Review Letters
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A cryptographically secure on-chip verification protocol was implemented on a trapped-ion quantum processor, enabling quantum computers to self-verify results despite hardware noise. The protocol, which alternates between test and computation runs, verified a 52-qubit graph state without external devices. This approach supports scalable, real-time certification on current and future quantum hardware.
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